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the information in this document is subject to change without notice. before using this document, please confirm that this is the latest version. not all products and/or types are available in every country. please check with an nec electronics sales representative for availability and additional information. mos integrated circuit pd168103 5-channel operational am plifier, iris driver, and 4-channel h-bridge driver data sheet document no. s17332ej1v0ds00 (1st edition) date published february 2005 ns cp(k) printed in japan 2004 description the pd168103 is the motor driver ic with iris control circuit, operational amplifier and 4-ch h-bridge output. smooth operation is possible for iris control with linear method. the package is 48-pin thin type qfn and then it helps reduce the mounting area and height. the pd168103 is suitable for the lens dr ive of a camcorder, dsc, etc. features ? 5-ch h-bridge circuits employing power mos fet ? low-voltage driving lv dd = 2.7 to 3.6 v, av dd = 4.5 to 5.5 v, v m12 = v m34 = v shutter = v iris = 2.7 to 5.5 v ? output on-state resistance: 2.0 ? typ., 3.0 ? max. (4-ch h-bridge block, sum of top and bottom stage, v m = 5 v) ? pwm output (ch1 to ch4) ? output current dc current: 0.3 a/ch (when each channel is used independently) peak current: 0.7 a/ch (when each channel is used independently) ? 3-ch general-purpose operational amplifier input offset voltage: 5 mv input voltage range: 0 to av dd ? 1.5 v output voltage range: 0.2 to av dd ? 0.2 v ? 1-ch current sink amplifier output current: 5 ma ? 1-ch 1/2v dd output amplifier ? iris driver block supporting linear driving ? pre-driver amplifier of the iris driver block ? undervoltage lockout circuit output circuit and amplifier stop at lv dd = 1.7 v typ. or less. ? overheat protection circuit operates at 150c or more and shuts down the output circuit. ? mounted on 48-pin plastic wqfn (7 x 7) applications lens motor driving for dvc and dsc, etc. ordering information part number package marking packing type pd168103k9-5b4-a note 48-pin plastic wqfn (7 x 7) d168103 ? tray stuffing ? dry pack note pb-free (this product does not contain pb in external electrode and other parts.)
data sheet s17332ej1v0ds 2 pd168103 1. block diagram out 1b en 12 out 1a out 1 out 2a out 2b v m12 pgnd12 in 1p in 1m h-bridge control amp. control tsd uvlo h-bridge 1 h-bridge 2 in 1 in 2 en 34 in 3 in 4 gnd lv dd lv dd av dd 1/2lv dd av dd out 3b out 3a out 4a out 4b v m34 pgnd34 h-bridge 3 h-bridge 4 lv dd resetb ir in1 out 4d pgnd5 logic power in ref out ref analog power amp. on/off control + ? ? + amp0 amp1 out 2 in 2p in 2m av dd + ? amp2 out 3 in 3p in 3m av dd + ? amp3 out 4s in 4p in 4m av dd + ? amp4 av dd gnd + ? amp5 ir in2 in irp in irm out irp out irm v sutter v iris iris control 44 42 46 48 45 43 47 17 19 15 13 16 18 14 7 8 9 10 21 29 11 33 32 30 28 27 31 41 39 40 38 36 37 26 24 25 20 23 22 4 5 6 2 1 12 3 34 35 cautions 1. p in pin name means plus, and m in pin name means minus. 2. a pull-down resistor (50 to 200 k ) is connected to the logic input pins (en 12 , en 34 , in 1 , in 2 , in 3 , and in 4 ). a pull-up resistor (50 to 200 k ) is connected to the ir in1 and ir in2 pins.
data sheet s17332ej1v0ds 3 pd168103 2. pin functions (1/2) pin no. pin name i/o function 1 lv dd ? logic power supply voltage pin 2 gnd ? logic and analog gnd pin 3 resetb input reset input pin 4 en 12 input ch1 and ch2 output control input pin 5 in 1 input ch1 input pin 6 in 2 input ch2 input pin 7 en 34 input ch3 and ch4 output control input pin 8 in 3 input ch3 input pin 9 in 4 input ch4 input pin 10 ir in1 input iris control logic input pin 1 11 ir in2 input iris control logic input pin 2 12 av dd ? analog power supply voltage pin 13 out 4b output ch4 output pin b 14 pgnd34 ? ch3 and ch4 gnd pin 15 out 4a output ch4 output pin a 16 vm 34 ? ch3 and ch4 power supply voltage pin 17 out 3b output ch3 output pin b 18 pgnd34 ? ch3 and ch4 gnd pin 19 out 3a output ch3 output pin a 20 out 4s output amplifier 4 (amp4) source output pin (source) 21 out 4d output amplifier 4 (amp4) drain output pin (sink) 22 in 4m input amplifier 4 (amp4) minus input pin 23 in 4p input amplifier 4 (amp4) plus input pin 24 in 3p input amplifier 3 (amp3) plus input pin 25 in 3m input amplifier 3 (amp3) minus input pin 26 out 3 output amplifier 3 (amp3) output pin 27 v shutter ? shutter (on/off) power supply voltage pin 28 out irm output iris minus output pin 29 pgnd5 ? iris and shutter gnd pin 30 out irp output iris plus output pin 31 v iris ? iris (linear) power supply voltage pin 32 in irm input iris linear control (amp5) minus input pin 33 in irp input iris linear control (amp5) plus input pin 34 in ref input 1/2av dd amplifier (amp0) input pin (for capacitor connection)
data sheet s17332ej1v0ds 4 pd168103 (2/2) pin no. pin name i/o function 35 out ref output 1/2av dd amplifier (amp0) output pin 36 in 2p input amplifier 2 (amp2) plus input pin 37 in 2m input amplifier 2 (amp2) minus input pin 38 out 2 output amplifier 2 (amp2) output pin 39 in 1p input amplifier 1 (amp1) plus input pin 40 in 1m input amplifier 1 (amp1) minus input pin 41 out 1 output amplifier 1 (amp1) output pin 42 out 1a output ch1 output pin a 43 pgnd12 ? ch1 and ch2 gnd pin 44 out 1b output ch1 output pin b 45 v m12 ? ch1 and ch2 power supply voltage pin 46 out 2a output ch2 output pin a 47 pgnd12 ? ch1 and ch2 gnd pin 48 out 2b output ch2 output pin b
data sheet s17332ej1v0ds 5 pd168103 3. function operation table 3.1 reset function the internal circuit is shut off and the circuit current is kept to 1 a max. when the resetb pin is made l (reset status). in this status, the output pin goes into a hi-z (high impedanc e) state. set the resetb pin h for normal usage. remark h: high level, l: low level 3.2 stepping motor driving block table 3 ? 1. i/o truth table of the stepping motor driving block en 12 , en 34 in 1 , in 2 , in 3 , in 4 out 1a , out 2a , out 3a , out 4a out 1b , out 2b , out 3b , out 4b h l h l h l h l l hi-z hi-z h hi-z hi-z
data sheet s17332ej1v0ds 6 pd168103 3.3 iris motor driving block table 3 ? 2. i/o truth table of the iris driving block ir in1 ir in2 operation mode output state of h-bridge out irp out irm q1 q2 q3 q4 l l normal operation on off off on linear linear (amp. control) (linear) l h shutter off on on off l h h l iris open on off off on h l h h output all off off off off off hi-z hi-z figure 3 ? 1. description of the operation fi gure of the iris motor driving block in irp in irm + ? q4 v iris out irp in irp in irm out irm + ? normal shutter out irp out irm v shutter open all off v iris out irp out irm v iris out irp out irm v shutter q4 v iris out 7a out 7b q2 q3 q1 v shutter
data sheet s17332ej1v0ds 7 pd168103 4. functional deployment 4.1 undervoltage lockout (uvlo) circuit this function is to forcibly stop the operation of the pd168103 to prevent malfunctioning if lv dd drops. when uvlo operates, the driver output an d amplifier circuit are the off status. the uvlo circuit detects a voltage drop if lv dd drops to 1.7 v typ. in the non-reset status (resetb = h). in the reset status (resetb = l), it detects a voltage drop if lv dd drops to 0.6 v typ. this circuit may not operate if the lv dd voltage abruptly drops for just a few s. 4.2 overheat protection (tsd) circuit this function is to forcibly stop the operation of the driver output to protect it from destruction due to overheating if the chip temperature of the pd168103 rises. the overheat protection circuit operates when the chip temperature rises to 150 c or more. when overheat is detected, the driver output is stopped. when resetb = l (the reset status) or when uvlo is det ected, the overheat protecti on circuit does not operate. 4.3 power up sequence the pd168103 has a circuit that prevents current from flowing into the v m , v shutter and v iris pins (from the next, these are written as the motor power supply pins) when lv dd = 0 v or av dd = 0 v. therefore, the current that flows into the motor power supply pins are cut off when lv dd = 0 v. because the lv dd pin voltage, the av dd pin voltage and the motor power supply pins voltage are monitored, a current of 1 a typ. flows into each one of the motor power supply pins when lv dd is applied.
data sheet s17332ej1v0ds 8 pd168103 5. note on correct use 5.1 pin processing of unused circuit the input/output pins of an unused circui t must be processed as specified below. a pull-down or pull-up resistor is connected inside to t he logic input pins. connect t he input pins to the gnd or lv dd (in ir1 and in ir2 ) potential when they are not used. a pull-down resistor is not connected to the reset b pin. be sure to fix the resetb pin to the lv dd or gnd potential when it is used. 5.2 out 4s pin keep the voltage in the out 4s pin to 2 v or less. if an application circuit like the one shown below is used, t he input voltage range of the am plifier is also 2 v or less. in 4p in 4m + ? out 4s out 4d
data sheet s17332ej1v0ds 9 pd168103 6. electrical specifications absolute maximum ratings (t a = 25 c, glass epoxy board of 100 mm x 100 mm x 1 mm with copper foil area of 15%) parameter symbol condition rating unit power supply voltage lv dd control block ? 0.5 to +6.0 v av dd analog block ? 0.5 to +6.0 v v m12 , v m34 stepping motor block ? 0.5 to +6.0 v v shutter , v iris iris block ? 0.5 to +6.0 v input voltage note1 v in ? 0.5 to lv dd + 0.5 v output pin voltage 1 v out1 motor block 6.2 v output pin voltage 2 v out2 amplifier block ? 0.5 to av dd + 0.5 v dc output current i d1(dc) dc (stepping motor) 0.3 a/ch i d2(dc) dc (iris) 0.2 a/ch instantaneous output current i d(pulse) pw < 10 ms, duty cycle 20% 0.7 a/ch power consumption p t 1.0 w peak junction temperature note2 t ch(max) 150 c storage temperature t stg ? 55 to +150 c notes 1. keep v in to less than 6 v. 2. the overheat protection circuit operates at t ch > 150 c. when overheat is detec ted, all the circuits are stopped. the overheat protection circuit does not operate at reset or on detection of ulvo. caution product quality may suffer if the absolute maximum rating is exceeded even momentarily for any parameter. that is, the ab solute maximum ratings are rated valu es at which the product is on the verge of suffering physical damage , and therefore the product must be used under conditions that ensure that the absolute m aximum ratings are not exceeded. recommended operating conditions (t a = 25 c, glass epoxy board of 100 mm x 100 mm x 1 mm with copper foil area of 15%) parameter symbol condition min. typ. max. unit power supply voltage lv dd control block 2.7 3.6 v av dd analog block 4.5 5.5 v v m12 , v m34 stepping motor block 2.7 5.5 v v shutter , v iris iris block 2.7 5.5 v input voltage v in 0 v dd v dc output current i d1(dc) dc (stepping motor, when 2 chs are driven at same time) ? 0.2 +0.2 a/ch i d2(dc) dc (iris), maximum current when the shutter operates ? 0.1 +0.1 a/ch amplifier output current i out_amp1 amp1 to amp3 ? 5 +5 ma/ch amplifier output sink current i out_amp2 amp4 0 +5 ma logic input frequency f in 100 khz operating temperature range t a ? 10 70 c caution design each output current so that the junction temperature does not exceed 150oc.
data sheet s17332ej1v0ds 10 pd168103 electrical characteristics (u nless otherwise specified, t a = 25 c, lv dd = 3.0 v, av dd = 5.0 v, v m = v shutter = v iris = 5.0 v) overall and h-bridge block (stepping motor) parameter symbol condition min. typ. max. unit lv dd pin current in standby mode ilv dd(stb) resetb = 0 v 1.0 a av dd pin current in standby mode iav dd(stb) resetb = 0 v 1.0 a v m pin current in standby mode iv m(stb) resetb = 0 v 1.0 a lv dd pin current in during operation i dd(act) resetb = lv dd 2.0 ma high-level input current i ih v in = lv dd 60 a low-level input current i il v in = 0 v ? 1.0 a input pull-down resistance r ind 50 200 k high-level input voltage v ih 0.7 x v dd v low-level input voltage v il 0.3 x v dd v h-bridge on-state resistance r on i m = 0.2 a, sum of upper and lower stages 2.0 3.0 output leakage current note 1 i m(off) per v m pin, all control pins: low level 1.0 a low-voltage detection voltage note 2 v dds1 resetb = h 1.7 2.5 v output turn-on time t on r l = 20 0.5 1.0 s output turn-off time t off 0.1 0.4 s output rise time t r 0.05 0.2 0.4 s output fall time t f 50 100 ns notes 1. pd168103 has a circuit that prevents current from flowing into the v m pin when lv dd = 0 v. 2. unlike normal operations, after a reset the detection voltage becomes 0.6 v typ. figure 6 ? 1. switching characteristic waveform of the stepping motor driving block 100% 0% 0% 10% 10% ? 10% ? 10% 50% 50% ? 50% ? 50% 50% 90% 90% ? 90% ? 90% 50% 100% 100% ? 100% t on t f t r t f t r t off t off t on v in i dr
data sheet s17332ej1v0ds 11 pd168103 h-bridge block (iris motor) parameter symbol condition min. typ. max. unit v iris pin current in standby mode iv iris(stb) resetb = 0 v 1.0 a v shutter pin current in standby mode iv shutter(stb) resetb = 0 v 1.0 a high-level input current i ih v in = lv dd 1.0 a low-level input current i il v in = 0 v ? 60 a input pull-up resistance r ind 50 200 k high-level input voltage v ih 0.7 x v dd v low-level input voltage v il 0.3 x v dd v h-bridge on-state resistance r on1 r l = 50 , sum of upper and lower stages 2.5 3.5 output turn-on time t onh1 when linear driving, r l = 50 0.01 25 35 s t onh2 when full on, r l = 50 0.01 1.0 2.0 s output turn-off time t offh 0.01 1.0 2.0 s output rise time t rh 60 ns output fall time t fh 80 ns control amplifier offset voltage v io amp5 5 7.5 mv figure 6 ? 2. switching characteristic wavefo rm of the iris motor driving block 100% 0% 0% ? 10% ? 10% 50% 50% ? 50% ? 50% 50% ? 90% ? 90% 50% 100% 100% ? 100% t on t r t f t off t off t on ir in2 i iris at ir in1 = l linear operation shutter linear operation
data sheet s17332ej1v0ds 12 pd168103 operational amplifier block parameter symbol condition min. typ. max. unit av dd pin current in during operation ia dd output open 3.0 ma input offset voltage 1 v io1 amp1 to amp3, amp5 3 5 mv input offset voltage 2 v io2 amp4 5 7 mv common mode input voltage range 1 v icm1 amp1 to amp3, amp5 0 av dd ? 1.5 v common mode input voltage range 2 v icm2 amp4 0 av dd ? 2.0 v high-level output voltage v oh amp1 to amp3, when i out = +2 ma av dd ? 0.2 v low-level output voltage v ol amp1 to amp3, when i out = ? 2 ma 0.2 v large amplitude voltage gain a v amp1 to amp3, dc 80 db slew-rate sr amp1 to amp3, a v = 1 db ,r l 10 k 0.5 v/ s 1/2 av dd output voltage accuracy v o amp0, i out = 100 a 2.4 2.5 2.6 v
data sheet s17332ej1v0ds 13 pd168103 7. typical characteristics (unless otherwise specified, t a = 25 c, lv dd = 3.0 v, av dd = v m = v shutter = v iris = 5.0 v) p t vs. t a characteristic r on vs. t a characteristic (h-bridge 1 to 4) p t - total power dissipation - w 0203040 10 50 60 70 80 90 100 1.2 1 0.8 0.6 0.4 0.2 0 125c/w t a - ambient temperature - 1 1.5 2 2.5 -40 -20 0 20 40 60 80 100 out 4b out 4 a out 1a out 1b out 4a out 4b out 1b out 1 a t a - ambient temperature - 1 1.5 2 2.5 -40-20 0 20406080100 out ir+ out ir ? out ir ? out ir+ t a - ambient temperature - 0 10 20 30 40 50 60 70 01234567 i ih i il lv dd - power supply voltage of control block - v v ih , v il vs. lv dd characteristic undervoltage lockout circuit characteristic v ih , v il - input voltage - v 0 1 2 3 4 5 01234567 v ih v il lv dd - power supply voltage of control block - v v dds - undervoltage detection voltage - v 0 0.5 1 1.5 2 2.5 01234567 lv dd(h l) lv dd(l h) v m - power supply voltage of motor block - v
data sheet s17332ej1v0ds 14 pd168103 r on vs. v m characteristic r on vs. v iris , v shutter characteristic r on - h-bridge on-state resistance - 0 0.5 1 1.5 2 2.5 3 3.5 01234567 i m = 200 ma v m - power supply voltage of motor block - v 0 0.5 1 1.5 2 2.5 3 3.5 4 01234567 iris shutte r i m = 100 ma v iris , v shutter - power supply voltage of iris block - v r on - h-bridge on-state resistance of iris block - t onh , t offh vs. v m characteristic t r , t f vs. v iris , v shutter characteristic (when full on) t onh - h-bridge output circuit turn-on time - s t offh - h-bridge output ci rcuit turn-off time - s 0 0.2 0.4 0.6 0.8 1 1.2 01234567 t offh t onh r l = 20 v m - power supply voltage of motor block - v t r - iris h-bridge output circuit rise time - s t f - iris h-bridge output circuit fall time - s 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 01234567 r l = 50 t f t r v iris , v shutter - power supply voltage of iris block - v t r , t f vs. v m characteristic t onh1 , t offh vs. v iris , v shutter characteristic (when linear) t r - h-bridge output circuit rise time - s t f - h-bridge output circuit fall time - s 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 1234567 t f t r r l = 20 v m - power supply voltage of motor block - v t onh1 - iris h-bridge output circuit turn-on time - s t offh - iris h-bridge output circuit turn-off time - s 0 1 2 3 4 5 6 7 8 9 10 01234567 t offh t onh1 r l = 50 v iris , v shutter - power supply voltage of iris block - v
data sheet s17332ej1v0ds 15 pd168103 t r , t f vs. v iris , v shutter characteristic (when linear) t onh1 , t offh vs. v iris , v shutter characteristic (when full on) t r - iris h-bridge output circuit rise time - s t f - iris h-bridge output circuit fall time - s 0 2 4 6 8 10 12 14 01234567 t r t f r l = 50 v iris , v shutter - power supply voltage of iris block - v t onh1 - iris h-bridge output circuit turn-on time - s t offh - iris h-bridge output circuit turn-off time - s 0 0.2 0.4 0.6 0.8 1 1.2 01234567 r l = 50 t offh t onh1 v iris , v shutter - power supply voltage of iris block - v i m vs. v m characteristic ilv dd vs. lv dd characteristic i m - v m pin current when off - a 0 1 2 3 4 5 6 7 8 01234567 resetb: h en, in: l v m - power supply voltage of motor block - v ilv dd - lv dd pin current - a 0 100 200 300 400 500 600 700 01234567 resetb: h en, in: l lv dd - power supply voltage of control block - v
data sheet s17332ej1v0ds 16 pd168103 8. standard connection example h-bridge control amp. control tsd uvlo h-bridge 1 h-bridge 2 motor 1 motor 2 cpu cpu h-ref dr+ dr ? lv dd av dd 1/2lv dd out 1b out 1a out 2a out 2b v m12 pgnd12 out 3b out 3a out 4a out 4b v m34 pgnd34 h-bridge 3 h-bridge 4 lv dd logic power analog power amp. on/off control + ? ? + amp0 amp1 av dd + ? amp2 av dd + ? amp3 av dd + ? amp4 av dd gnd + ? amp5 iris control cds reset en 34 in 3 in 4 ir in1 ir in2 out 4d pgnd5 in irp in irm out irp out irm v sutter v iris out 1 in 1p in 1m out 2 in 2p in 2m out 3 in 3p in 3m out 4s in 4p in 4m resetb out ref iris-ctl dc/dc converter v m = 2.7 to 5.5 v lv dd = 2.7 to 3.6 v av dd = 4.5 to 5.5 v 1 to 10 f battey en 34 in 3 in 4 ir in1 ir in2 iris-ctl h-ref h-gain hall-ad en 12 in 1 in 2 gnd lv dd av dd in ref position detection circuit av dd + ? h
data sheet s17332ej1v0ds 17 pd168103 9. package drawing p 0.08min. 0.08min. lp s s b a b y1 s s f x4 a s y b s t x4 c2 a c a2 a1 c1 b1 b a e p d d/2 /2 4 ? c0.5 36 25 112 37 24 48 13 hd hd ze zd e e /2 /2 he he d e f hd he t a a1 a2 b b1 c c1 c2 e lp x y y1 zd ze 0.64 0.23 0.05 0.50 0.05 0.08 0.10 0.625 0.625 0.20 0.03 0.14 0.16 item dimensions 0.17 0.40 0.10 0.14 0.20 6.75 6.75 0.20 7.00 7.00 0.20 0.67 0.03 p48k9-50-5b4-1 48-pin plastic wqfn (7x7) part terminal section detail of s x b m b a + 0.08 ? 0.04 + 0.02 ? 0.025 (unit:mm) notes 1 "t" and "f" excludes mold flash 2 although there are 4 terminals in the corner part of a package, these terminals are not designed for interconnection, but for manufacturing process of the package, therefor do not intend to solder these 4 terminals, solderablity of the 4 terminals are not guaranteed.
data sheet s17332ej1v0ds 18 pd168103 10. recommended soldering conditions the pd168103 should be soldered and mounted under the following recommended conditions. for soldering methods and conditions other than thos e recommended below, contact an nec electronics sales representative. for technical information, see the following website. semiconductor device mount manual (http: //www.necel.com/pkg/e n/mount/index.html) type of surface mount device pd168103k9-5b4-a note1 : 48-pin plastic wqfn (7 x 7) process conditions symbol infrared reflow package peak temperature: 260 c, time: 60 seconds max. (at 220 c or higher) , count: three times or less, exposure limit: 3 days note2 (after that, prebake at 125 c for 10 hours) , flux: rosin flux with low chlorine (0.2 wt% or below) recommended. products other than in heat-resistant trays (such as those packaged in a magazine, taping, or non-thermal-resistant tray ) cannot be baked in their package. ir60-103-3 notes 1. pb-free (this product does not contain pb in external electrode and other parts.) 2. after opening the dry pack, store it a 25 c or less and 65% rh or less for the allowable storage period. caution do not use different soldering met hods together (except for partial heating).
data sheet s17332ej1v0ds 19 pd168103 1 2 3 4 voltage application waveform at input pin waveform distortion due to input noise or a reflected wave may cause malfunction. if the input of the cmos device stays in the area between v il (max) and v ih (min) due to noise, etc., the device may malfunction. take care to prevent chattering noise from entering the device when the input level is fixed, and also in the transition period when the input level passes through the area between v il (max) and v ih (min). handling of unused input pins unconnected cmos device inputs can be cause of malfunction. if an input pin is unconnected, it is possible that an internal input level may be generated due to noise, etc., causing malfunction. cmos devices behave differently than bipolar or nmos devices. input levels of cmos devices must be fixed high or low by using pull-up or pull-down circuitry. each unused pin should be connected to v dd or gnd via a resistor if there is a possibility that it will be an output pin. all handling related to unused pins must be judged separately for each device and according to related specifications governing the device. precaution against esd a strong electric field, when exposed to a mos device, can cause destruction of the gate oxide and ultimately degrade the device operation. steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it when it has occurred. environmental control must be adequate. when it is dry, a humidifier should be used. it is recommended to avoid using insulators that easily build up static electricity. semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. all test and measurement tools including work benches and floors should be grounded. the operator should be grounded using a wrist strap. semiconductor devices must not be touched with bare hands. similar precautions need to be taken for pw boards with mounted semiconductor devices. status before initialization power-on does not necessarily define the initial status of a mos device. immediately after the power source is turned on, devices with reset functions have not yet been initialized. hence, power-on does not guarantee output pin levels, i/o settings or contents of registers. a device is not initialized until the reset signal is received. a reset operation must be executed immediately after power-on for devices with reset functions. power on/off sequence in the case of a device that uses different power supplies for the internal operation and external interface, as a rule, switch on the external power supply after switching on the internal power supply. when switching the power supply off, as a rule, switch off the external power supply and then the internal power supply. use of the reverse power on/off sequences may result in the application of an overvoltage to the internal elements of the device, causing malfunction and degradation of internal elements due to the passage of an abnormal current. the correct power on/off sequence must be judged separately for each device and according to related specifications governing the device. input of signal during power off state do not input signals or an i/o pull-up power supply while the device is not powered. the current injection that results from input of such a signal or i/o pull-up power supply may cause malfunction and the abnormal current that passes in the device at this time may cause degradation of internal elements. input of signals during the power off state must be judged separately for each device and according to related specifications governing the device. notes for cmos devices 5 6
pd168103 reference documents nec semiconductor device reliability/ quality control system (c10983e) quality grades on nec se miconductor devices (c11531e) the information in this document is current as of february, 2005. the information is subject to change without notice. for actual design-in, refer to the latest publications of nec electronics data sheets or data books, etc., for the most up-to-date specifications of nec electronics products. not all products and/or types are available in every country. please check with an nec electronics sales representative for availability and additional information. no part of this document may be copied or reproduced in any form or by any means without the prior written consent of nec electronics. nec electronics assumes no responsibility for any errors that may appear in this document. nec electronics does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of nec electronics products listed in this document or any other liability arising from the use of such products. no license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of nec electronics or others. descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. the incorporation of these circuits, software and information in the design of a customer's equipment shall be done under the full responsibility of the customer. nec electronics assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. while nec electronics endeavors to enhance the quality, reliability and safety of nec electronics products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. to minimize risks of damage to property or injury (including death) to persons arising from defects in nec electronics products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment and anti-failure features. nec electronics products are classified into the following three quality grades: "standard", "special" and "specific". the "specific" quality grade applies only to nec electronics products developed based on a customer- designated "quality assurance program" for a specific application. the recommended applications of an nec electronics product depend on its quality grade, as indicated below. customers must check the quality grade of each nec electronics product before using it in a particular application. "standard": computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots. "special": transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support). "specific": aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. the quality grade of nec electronics products is "standard" unless otherwise expressly specified in nec electronics data sheets or data books, etc. if customers wish to use nec electronics products in applications not intended by nec electronics, they must contact an nec electronics sales representative in advance to determine nec electronics' willingness to support a given application. (note) (1) "nec electronics" as used in this statement means nec electronics corporation and also includes its majority-owned subsidiaries. (2) "nec electronics products" means any product developed or manufactured by or for nec electronics (as defined above). ? ? ? ? ? ? m8e 02. 11-1

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